Sample and hold

In electronics, a sample and hold (S/H, also "follow-and-hold"[1]) circuit is an analog device that samples (captures, grabs) the voltage of a continuously varying analog signal and holds (locks, freezes) its value at a constant level for a specified minimal period of time. Sample and hold circuits and related peak detectors are the elementary analog memory devices. They are typically used in analog-to-digital converters to eliminate variations in input signal that can corrupt the conversion process.[2]

A typical sample and hold circuit stores electric charge in a capacitor and contains at least one fast FET switch and at least one operational amplifier.[1] To sample the input signal the switch connects the capacitor to the output of a buffer amplifier. The buffer amplifier charges or discharges the capacitor so that the voltage across the capacitor is practically equal, or proportional to, input voltage. In hold mode the switch disconnects the capacitor from the buffer. The capacitor is invariably discharged by its own leakage currents and useful load currents, which makes the circuit inherently volatile, but the loss of voltage (voltage drop) within a specified hold time remains within an acceptable error margin.

Contents

Purpose

The sample and hold circuits are essentially used in linear systems. In some kinds of analog-to-digital converters, the input is often compared to a voltage generated internally from a digital-to-analog converter (D-A-C). The circuit tries a series of values and stops converting once the voltages are "the same" within some defined error margin. If the input value was permitted to change during this comparison process, the resulting conversion would be inaccurate and possibly completely unrelated to the true input value. Such successive approximation converters will often incorporate internal sample and hold circuitry. In addition, sample and hold circuits are often used when multiple samples need to be measured at the same time. Each value is sampled and held, using a common sample clock.

Implementation

In order that the input voltage is held constant for all practical purposes, it is essential that the capacitor have very low leakage, and that it not be loaded to any significant degree which calls for a very high input impedance.

A true sample and hold circuit is connected to the buffer for a short period of time; a track and hold circuit is designed to track input continuously.

The current carrying capacity of devices (like amplifiers) that provide signals to the analog switch must be very high, so that it can sufficiently drive capacitive loads. Hence the input amplifiers used in the circuit are operational amplifiers with good slew rates and capable of driving capacitive loads stably.

The analog switches used in the circuit must have low on and off leakage currents, for which an efficient bipolar transistor arrangement with low leakage currents in the off condition is employed. The output amplifier must have good slew rate and low bias currents. A MOSFET unity gain follower may be used for the purpose.

See also

Notes

  1. ^ a b Horowitz and Hill, p. 220.
  2. ^ Kefauver and Patschke, p. 37.

References